Clock synchronized nonvolatile memory device

Abstract

A nonvolatile memory apparatus including plural terminals having clock, command and other terminals, a clock generator, and plural nonvolatile memory cells. The clock and command terminals respectively receive a first clock signal and commands having read and program commands. The clock generator generates a second clock signal. In response to the read command, the apparatus reads data from the memory cells, and outputs data to outside of the apparatus in response to the first clock signal via the other terminal except the command terminal. In response to the program command, the apparatus receives data from outside of the apparatus in response to the first clock signal via the other terminal except the command terminal and writes data to the memory cells. The data writing to the memory cells is performed using the second clock signal.