The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2005

Filed:

Mar. 31, 2000
Applicants:

Youfeng Wu, Palo Alto, CA (US);

Ali Adl-tabatabai, Santa Clara, CA (US);

David A. Berson, Marietta, GA (US);

Jesse Fang, San Jose, CA (US);

Rajiv Gupta, Tucson, AZ (US);

Inventors:

Youfeng Wu, Palo Alto, CA (US);

Ali Adl-Tabatabai, Santa Clara, CA (US);

David A. Berson, Marietta, GA (US);

Jesse Fang, San Jose, CA (US);

Rajiv Gupta, Tucson, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 945 ;
U.S. Cl.
CPC ...
Abstract

A hierarchical software profiling mechanism that gathers hierarchical path profile information has been described. Software to be profiled is instrumented with instructions that save an outer path sum when an inner region is entered, and restore the outer path sum when the inner region is exited. When the inner region is being executed, an inner path sum is generated and a profile indicator representing the inner path traversed is updated prior to the outer path sum being restored. The software to be profiled is instrumented using information from augmented control flow graphs that represent the software.


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