The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2005
Filed:
Jun. 10, 2002
Timothy M. Burks, Palo Alto, CA (US);
Michael A. Riepe, San Jose, CA (US);
Hamid Savoj, Los Altos, CA (US);
Robert M. Swanson, Palo Alto, CA (US);
Karen E. Vahtra, Sunnyvale, CA (US);
Lukas Van Ginneken, San Jose, CA (US);
Timothy M. Burks, Palo Alto, CA (US);
Michael A. Riepe, San Jose, CA (US);
Hamid Savoj, Los Altos, CA (US);
Robert M. Swanson, Palo Alto, CA (US);
Karen E. Vahtra, Sunnyvale, CA (US);
Lukas van Ginneken, San Jose, CA (US);
Magma Design Automation, Inc., Santa Clara, CA (US);
Abstract
What is disclosed is a method for budgeting timing in a hierarchically decomposed integrated circuit design, which includes: 1) optimizing at least one path through block pins, the optimization resulting in assigned gains for all the cells along said at least one path; 2) performing timing analysis on the at least one path, the timing analysis using the assigned gains in order to generate arrival times for signals at said block pins; and 3) deriving a tinting budget by examining said generated arrival times at said block pins.