The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2005
Filed:
Apr. 25, 2002
Jeffrey R. Wilcox, Folsom, CA (US);
Opher D. Kahn, Zichron-Yacov, IL;
Alon Naveh, Ramat Hasharon, IL;
Jeffrey R. Wilcox, Folsom, CA (US);
Opher D. Kahn, Zichron-Yacov, IL;
Alon Naveh, Ramat Hasharon, IL;
Intel Corporation, Santa Clara, CA (US);
Abstract
A memory controller (MC) includes a buffer control circuit (BCC) to enable/disable buffer coupled to a terminated bus. The BCC can detect transactions and speculatively enable the buffers before the transaction is completely decoded. If the transaction is targeted for the terminated bus, the buffers will be ready to drive signals onto the terminated bus by the time the transaction is ready to be performed, thereby eliminating the 'enable buffer' delay incurred in some conventional MCs. If the transaction is not targeted for the terminated bus, the BCC disables the buffers to save power. In MCs that queue transactions, the BCC can snoop the queue to find transactions targeted for the terminated bus and begin enabling the buffers before these particular transactions are fully decoded.