The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2005
Filed:
Apr. 04, 2003
Jaime D. Weidler, Sunnyvale, CA (US);
Robert A. Newman, Santa Clara, CA (US);
Jinsu Kwon, San Jose, CA (US);
Jaime D. Weidler, Sunnyvale, CA (US);
Robert A. Newman, Santa Clara, CA (US);
Jinsu Kwon, San Jose, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A method and an apparatus for preventing misalignment of semiconductor packaging assembly materials. In particular, a method of fabricating a fully aligned flip-chip assembly having a variable pitch packaging substrate, involves: providing a set of input data; calculating a set of intermediate data using the input data set; calculating a set of final substrate pad coordinates using the intermediate data set, thereby providing a set of output data; providing a packaging substrate having a plurality of substrate pads thereon formed according to the output data set to compensate for any inchoate thermogeometric hysteresis arising from any mismatched coefficients of thermal expansion, and thereby fabricating the flip-chip assembly having a variable pitch packaging substrate, and an assembly thereby fabricated which is more robust to any temperature-induced stress.