The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2005

Filed:

Apr. 11, 2003
Applicants:

Yoshinori Takano, Tokyo, JP;

Yasuhiko Honda, Yokohama, JP;

Toru Tanzawa, Tokyo, JP;

Masao Kuriyama, Fujisawa, JP;

Inventors:

Yoshinori Takano, Tokyo, JP;

Yasuhiko Honda, Yokohama, JP;

Toru Tanzawa, Tokyo, JP;

Masao Kuriyama, Fujisawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1606 ;
U.S. Cl.
CPC ...
Abstract

A nonvolatile semiconductor memory device with a plurality of read modes switchably built therein is provided. This nonvolatile semiconductor memory device is the one that has a memory cell array in which electrically rewritable nonvolatile memory cells are laid out and a read circuit which performs data readout of the memory cell array. The nonvolatile semiconductor memory device has a first read mode and a second read mode. The first read mode is for reading data by means of parallel data transfer of the same bit number when sending data from the memory cell array through the read circuit up to more than one external terminal. The second read mode is for performing parallel data transfer of a greater bit number than that of the first read mode when sending data from the memory cell array to the read circuit while performing data transfer of a smaller bit number than the bit number when sending data from the read circuit up to the external terminal.


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