The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2005
Filed:
Dec. 06, 2002
Applicant:
Jaroslav Raszka, Fremont, CA (US);
Inventor:
Jaroslav Raszka, Fremont, CA (US);
Assignee:
Virage Logic Corporation, Fremont, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C 1600 ;
U.S. Cl.
CPC ...
Abstract
Various apparatuses and methods in which an integrated circuit includes a non-volatile memory cell and a keep mode circuit. The non-volatile memory cell has a charge storage component. The keep mode circuit has a storage device and a keep mode switch. The storage device receives information stored in the non-volatile memory cell. The keep mode switch connects the storage device to the non-volatile memory cell in order to apply a static bias voltage across the charge storage component to restrict charge-loss to a predetermined level.