The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2005
Filed:
Aug. 30, 2002
Stewart Logie, Campbell, CA (US);
Sunil D. Mehta, Sunnyvale, CA (US);
Stewart Logie, Campbell, CA (US);
Sunil D. Mehta, Sunnyvale, CA (US);
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Abstract
A semiconductor device having an EEPROM memory cell includes a substrate having a principal surface and an isolation region having an inner edge surface bounding the tunnel region at the principal surface. The isolation region forms a perimeter of the tunnel region. A capacitor plate overlies the tunnel region and substantially the entire perimeter of the tunnel region. A tunnel dielectric layer overlies the tunnel region and separates the capacitor plate from the tunnel dielectric layer. The edges of the capacitor plate are displaced away from the tunnel dielectric layer to avoid a loss of tunneling current as a result of edge degradation with repeated programming and erasing of the EEPROM memory device. A process for fabrication of the device is also provided.