The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2005
Filed:
Dec. 27, 2002
Joon Ho Yoon, Seoul, KR;
Yong Chil Choi, Suwon, KR;
Suk Su Bae, Changwon, KR;
Samsung Electro-Mechanics Co., Ltd., Kyungki-Do, KR;
Abstract
A method of fabricating a chip scale package includes: preparing a wafer including a plurality of chips; forming an insulating layer on the upper surface of the wafer except in areas of two upper terminals of each chip; forming an upper conductive layer on the insulating layer so as to be connected to the upper terminals of the chips; forming a lower conductive layer on the lower surface of the wafer so as to be connected to a lower terminals of each chip; first dicing the wafer so that one side of the chip scale package is formed; forming electrode surfaces on side surfaces of the upper and the lower conductive layers which are defined by the side of the chip scale package formed in the first dicing step; dividing the upper conductive layer of each chip into two areas each connected to one of the two upper terminals; and second dicing the wafer into package units.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile