The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2005
Filed:
Dec. 04, 2003
Nhon Quach, San Jose, CA (US);
John Crawford, Los Gatos, CA (US);
Greg S. Mathews, Santa Clara, CA (US);
Edward Grochowski, San Jose, CA (US);
Chakravarthy Kosaraju, Sunnyvale, CA (US);
Nhon Quach, San Jose, CA (US);
John Crawford, Los Gatos, CA (US);
Greg S. Mathews, Santa Clara, CA (US);
Edward Grochowski, San Jose, CA (US);
Chakravarthy Kosaraju, Sunnyvale, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The present invention relates to the design of highly reliable high performance microprocessors, and more specifically to designs that use cache memory protection schemes such as, for example, a 1-hot plus valid bit scheme and a 2-hot vector cache scheme. These protection schemes protect the 1-hot vectors used in the tag array in the cache and are designed to provide hardware savings, operate at higher speeds and be simple to implement. In accordance with an embodiment of the present invention, a tag array memory including an input conversion circuit to receive a 1-hot vector and to convert the 1-hot vector to a 2-hot vector. The tag array memory also including a memory array coupled to the input conversion circuit, the memory array to store the 2-hot vector; and an output conversion circuit coupled to the memory array, the output conversion circuit to receive the 2-hot vector and to convert the 2-hot vector back to the 1-hot vector.