The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2005

Filed:

Aug. 01, 2003
Applicants:

Atila Alvandpour, Portland, OR (US);

Per Larsson-edefors, Rimforss, SE;

Ram K. Krishnamurthy, Beaverton, OR (US);

Krishnamurthy Soumyanath, Portland, OR (US);

Inventors:

Atila Alvandpour, Portland, OR (US);

Per Larsson-Edefors, Rimforss, SE;

Ram K. Krishnamurthy, Beaverton, OR (US);

Krishnamurthy Soumyanath, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19096 ;
U.S. Cl.
CPC ...
Abstract

A dual-rail static logic gate with a self cut-off mechanism is disclosed. In an embodiment, the output of the first rail is coupled to the input of the pull-up device of the second rail and vice versa. The cross-coupling allows the self cut-off mechanism of the static gate to function properly and provides for components which have lower capacitance than conventional static gates. The lower capacitance results in a faster static gate.


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