Method of forming a self-aligned, selectively etched, double recess high electron mobility transistor

Abstract

A method is provided for forming a self-aligned, selectively etched, double recess high electron mobility transistor. The method includes providing a semiconductor structure having a III-V substrate; a first relatively wide band gap layer, a channel layer, a second relatively wide band gap Schottky layer, an etch stop layer; a III-V third wide band gap layer on etch stop layer; and an ohmic contact layer on the third relatively wide band gap layer. A mask is provided having a gate contact aperture to expose a gate region of the ohmic contact layer. A first wet chemical etch is brought into contact with portions of the ohmic contact layer exposed by the gate contact aperture. The first wet chemical selectively removes exposed portions of the ohmic contact layer and underlying portions of the third relatively wide band gap layer. The etch stop layer inhibits the first wet chemical etch from removing portions of such etch stop layer. Next, a second wet chemical etch is brought into contact with structure etched by the first wet chemical etch. The second wet chemical etch selectively removes exposed portions of the ohmic contact layer while leaving substantially un-etched exposed portions of the third relatively wide band gap layer, the Schottky contact layer and the etch stop layer. The etch stop layer is removed. A metal layer is deposited over the mask and through gate aperture therein onto, and in Schottky contact with, the Schottky contact layer.