The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 2004
Filed:
Dec. 11, 2002
Yi-Tsung Jan, Taipei, TW;
Wen-Tsung Wang, Taipei, TW;
Sung-Min Wei, Hsinchu, TW;
Chih-Cherng Liao, Hsinchu, TW;
Zhe-Xiong Wu, Hualien, TW;
Mao-Tsang Chen, Taoyuan, TW;
Yuan-Heng Li, Taipei, TW;
Vanguard International Semiconductor Corporation, Hsinchu, TW;
Abstract
A method for fabricating source/drain devices. A semiconductor substrate is provided with a gate formed on the semiconductor substrate, and a hard mask layer formed on the gate. A first doped area is formed on a first side of the gate on the semiconductor substrate, and a second doped area is formed on a second side of the gate on the semiconductor substrate in a manner such that the second doped area is separated from the gate by a predetermined distance. A patterned photo resist layer is formed on the semiconductor substrate having an opening on the second side, the exposed gate equal to half the width of the gate. The semiconductor substrate is implanted and annealed to form a dual diffusion area on the second side of the gate using the patterned photo resist layer and the hard mask layer as masks.