The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2004

Filed:

Mar. 03, 2003
Applicant:
Inventors:

Joong-hyun Baek, Kyungki-do, KR;

Jin-yang Lee, Chungcheongnam-do, KR;

Yun-hyeok Im, Kyungki-do, KR;

Tae-koo Lee, Kyungki-do, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/124 ; H01L 2/302 ;
U.S. Cl.
CPC ...
H01L 2/124 ; H01L 2/302 ;
Abstract

A stacked semiconductor module includes a lower chip scale package (CSP) mounted on a module board, and an inverted upper CSP attached to the top of lower CSP to form a stacked semiconductor package. The lower and upper CSPs are electrically connected to each other outside of the stacked semiconductor package. This electrical connection may be made using the module board. Further, a conductive interconnection tape may be used to electrically connect the upper CSP to regions on the module board, which are electrically connected to the region at which the lower CSP is electrically connected to the module board.


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