The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2004
Filed:
Oct. 22, 2002
Joseph A. Yedinak, Mountaintop, PA (US);
Jon Gladish, Forty Fort, PA (US);
Sampat Shekhawat, Mountaintop, PA (US);
Gary M. Dolny, Mountaintop, PA (US);
Praveen Muraleedharan Shenoy, Wilkes-Barre, PA (US);
Douglas Joseph Lange, Mountaintop, PA (US);
Mark L. Rinehimer, Forty Fort, PA (US);
Fairchild Semiconductor Corporation, South Portland, ME (US);
Abstract
A quick punch-through integrated gate bipolar transistor (IGBT) includes a drift region and a gate. The drift region has a drift region dopant concentration and a drift region thickness. The gate has a gate capacitance. The drift region dopant concentration, drift region thickness and gate capacitance are adjusted dependent at least in part upon the PNP gain of the IGBT to maintain the potential difference between the gate and emitter at a level greater than the IGBT threshold voltage when the collector voltage reaches the bus voltage. This insures that the hole carrier concentration remains approximately equal to or greater than the drift region dopant concentration when the depletion layer punches through to the buffer region during the turn-off delay. Thus, the collector voltage overshoot and the rate of change of voltage and current are controlled, and electromagnetic interference is reduced, during turn off.