The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 2004
Filed:
Apr. 09, 2002
Edmond Otto Fey, Vestal, NY (US);
Raymond Thomas Galasco, Vestal, NY (US);
Thomas Richard Miller, Endwell, NY (US);
Anita Sargent, Endicott, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A PWB or multilayer board with circuit traces is treated by a process that serves to reduce the incident of failure of the board. The process includes the steps of applying a thin commoning layer of copper onto a catalyzed surface of the board substrate and the circuit lines. A photoresist is then applied over the commoning layer after which the photoresist is removed only from the commoning material over the circuit lines. A thin layer of a more noble metal, such as nickel, is electrodeposited over the exposed conductive layer. This is followed by a gold layer electrodeposited over the nickel in close registry therewith. The process provides the traces with a conforming nickel/gold layer that extends down the side of the traces. This reduces the tendency of a subsequent copper etch step from undercutting the nickel/gold, thereby causing slivers that could cause short circuiting between adjacent circuit patterns.