The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 02, 2004
Filed:
Oct. 02, 2000
Kazuhiro Kurihara, Sunnyvale, CA (US);
Pau-Ling Chen, Saratoga, CA (US);
FASL, LLC., Sunnyvale, CA (US);
Abstract
The present invention discloses methods and systems of accomplishing I/O-based redundancy for a memory device that includes two-bit memory cells. The memory device includes a core two-bit memory cell array and a redundant two-bit memory cell array. The configuration of the core two-bit memory cell array is non-uniform such that the two-bit memory cells therein are not arranged in a sequential order. Due to the non-uniform configuration, I/O based redundancy is accomplished by decoding the addresses with a redundant Y-decoder circuit and translating the addresses using an address translation circuit. The translated addresses identify the location of the two-bit memory cells within the non-uniform core two-bit memory cell array. The decoding of the addresses configures the redundant two-bit memory cell array to provide a configuration that matches the two-bit memory cells in the location identified by the translated address.