Matrix of memory cells fabricated by means of a self-aligned source process, comprising rom memory cells, and related manufacturing process

Abstract

Matrix of memory cells formed using a method allowing for a self-alignment of the respective source region with the respective field oxide layer and the respective overlying polysilicon layer of each single cell of the matrix, the matrix including at least one first ROM memory cell suitable for permanently storing a first logic level, associated with a respective row and a respective column of the matrix, the first cell including a silicon substrate of a first conductivity type over which a first isolation region and a second isolation region are formed delimiting therebetween a longitudinal stripe, a gate element extending transversally through the stripe from at least one side of the first isolation region to at least one side of the second isolation region, a third region of a second conductivity type and a fourth region of a second conductivity type formed in the substrate along the stripe, and a field oxide region adapted to prevent the formation of a conductive channel in the substrate, and at least a second ROM cell for permanently storing a second logic level, identical to the first ROM memory cell but not provided with the field oxide region.