The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 2004
Filed:
Jul. 24, 2000
Bo Jin, Campbell, CA (US);
Kaichiu Wong, Sunnyvale, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
According to one embodiment, a structure for monitoring a process step may include an etch stop layer ( ) formed on a substrate ( ) and a trench emulation layer ( ) formed over an etch stop layer ( ). Monitor trenches ( ) may be formed through a trench emulation layer ( ) that terminate at an etch stop layer ( ). Monitor trenches ( ) may have a depth equal to a trench emulation layer ( ) thickness. A trench emulation layer ( ) thickness may be subject to less variation than a substrate trench depth. A monitor structure ( ) may thus be used to monitor features formed by one or more process steps that may vary according to trench depth. Such process steps may include a shallow trench isolation insulator chemical mechanical polishing step. In addition, or alternatively, a monitor structure ( ) may be formed on a non-semiconductor-on-insulator (SOI) wafer, but include SOI features, providing a less expensive alternative to monitoring some SOI process steps.