The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 19, 2004

Filed:

Jan. 21, 2003
Applicant:
Inventors:

Nobuhiro Tsuda, Tokyo, JP;

Koji Nii, Tokyo, JP;

Shoji Okuda, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

A memory device that consumes no wasteful power in selecting memory cells and achieves high operating speed and size and cost reductions, is provided. In reading of memory cell information, only a single memory cell in a single local block is activated through a read word line. Specifically, AND circuits are provided in correspondence with all memory cells. Each AND circuit receives as its inputs a block select signal for selecting one of the local blocks and an in-block memory cell select signal for selecting one of the memory cells in each local block in a common manner among the local blocks. The outputs from the AND circuits are applied to read word lines. Unselected memory cells are not activated and therefore no current flows from those memory cells to local read bit lines, thereby preventing wasteful power consumption.


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