The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 19, 2004
Filed:
Mar. 07, 2003
Applicant:
Inventors:
Akira Yamazaki, Hyogo, JP;
Atsuo Mangyo, Hyogo, JP;
Assignee:
Renesas Technology Corp., Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract
A test clock signal for determining timing of transferring a signal to an embedded memory, a memory clock signal for determining timing of latching signal/data of the embedded memory, and a latch timing signal for sampling a signal read from the memory are selectively sampled in accordance with a correcting test clock signal by a common flip flop. The phase differences of the latch timing signal, test clock signal and memory clock signal are measured externally. Thus, it is possible to accurately measure timing conditions such as set up/hold time and access time of the embedded synchronous memory.