The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2004

Filed:

Jun. 20, 2003
Applicant:
Inventors:

Qwai H. Low, Cupertino, CA (US);

Ramaswamy Ranganathan, Saratoga, CA (US);

Edwin M. Fulcher, Palo Alto, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 3/100 ;
U.S. Cl.
CPC ...
H01L 3/100 ;
Abstract

A bonding pad structure having an electrically conductive capping layer. An electrically conductive first supporting layer is disposed immediately under the electrically conductive capping layer, without any intervening layers between the electrically conductive capping layer and the electrically conductive first supporting layer. The electrically conductive first supporting layer is configured as one of a sheet having no voids and a sheet having slotted voids in a first direction. An electrically conductive second supporting layer is disposed under the electrically conductive first supporting layer. The electrically conductive second supporting layer is configured as one of a sheet having slotted voids in the first direction, a sheet having slotted voids in a second direction, and a sheet having checkerboard voids.


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