The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2004
Filed:
Apr. 26, 2002
Nasser Ali Jafari, Sunnyvale, CA (US);
Kenneth Dean Karklin, San Francisco, CA (US);
William T. Sprague, San Jose, CA (US);
Agilent Technologies, Inc., Palo Alto, CA (US);
Abstract
A planarization gauge assures probe card-to-wafer parallelism in semiconductor automatic test equipment (ATE) used for wafer test, and provides a standard system reference plane during the building and testing of ATE components. The planarization gauge has two planar and parallel surfaces that may serve as a system reference plane. The planarization gauge has at least one access hole for a depth gauge, and at least one optical target recognizable by a prober's upward looking camera. The planarization gauge is mechanically interchangeable with a probe card; thus, it is compatible with different planarization methods and platforms used in building and testing ATE components. The planarization gauge is manufactured and inspected in a manner as to assure traceability to established standards such as NIST. When used by all ATE vendors, the planarization gauge ensures correlation between the vendors' various planarization methods.