The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2004

Filed:

Apr. 28, 2000
Applicant:
Inventors:

Peter J. DesRosier, Portland, OR (US);

Dan W. Patterson, Sunnyvale, CA (US);

Vikram Gupta, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/100 ;
U.S. Cl.
CPC ...
G06F 1/100 ;
Abstract

An electronic component for failure detection and analysis of bus activity comprises configuration circuitry, a buffer, and read circuitry. The configuration circuitry, the buffer, the read circuitry and the bus being tracked are on the same die. The configuration circuitry identifies one or more modes, one or more triggers, and one or more responses associated with the triggers. The buffer stores transactions on a bus according to the configuration circuitry. The read circuitry reads data from the buffer. A method of tracking bus activity comprises configuring a bus activity tracking component; monitoring an interface for a trigger event; and performing associated responses upon the occurrence of the trigger event.


Find Patent Forward Citations

Loading…