The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 14, 2004

Filed:

Apr. 22, 2002
Applicant:
Inventors:

Haruo Sorimachi, Nagano, JP;

Yoshihiro Yoneda, Matto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/348 ; H05K 1/03 ; H05K 1/18 ;
U.S. Cl.
CPC ...
H01L 2/348 ; H05K 1/03 ; H05K 1/18 ;
Abstract

A mounting substrate on which a semiconductor element is to be mounted by flip-chip bonding, the semiconductor element having a surface on which a plurality of electrode terminals are arranged in a line, each of said electrode terminals having a protruded electrode formed thereon, wherein the surface of the mounting substrate on which the semiconductor element is to be mounted is provided with a protective film having an opening corresponding to an area of the semiconductor element where the protruded electrodes are located, a plurality of connection electrodes being arranged in the opening, the connection electrodes being provided with a solder for bonding it to the protruded electrodes, and being arranged at the same interval as that of the protruded electrodes, and each of the connection electrodes being connected to a wiring pattern of the mounting substrate, and wherein the length of a portion of the connection electrode from the center of the opening to the end thereof that is not connected with the wiring pattern is 150 &mgr;m or larger. A structure having a semiconductor element mounted on the substrate is also disclosed.


Find Patent Forward Citations

Sorimachi, Haruo. (2004). Mounting substrate and structure having semiconductor element mounted on substrate (U.S. Patent No. 6791186). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6791186

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…