The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 07, 2004
Filed:
Nov. 13, 2001
Lung-Chun Liu, Sunnyvale, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A method for displaying a schematic diagram of a circuit showing multiple time-frame signal values across storage elements includes identifying one or more time-frames in a circuit. The one or more time-frames are determined from a number of consecutive storage elements in a signal path in the circuit. The method also includes receiving a request to display signal values associated with a first storage element at a time-frame t. The method further includes displaying a first signal value carried on a first signal line coupled to an output of the first storage element at time-frame t and displaying a second signal value carried on a second signal line coupled to an input of the first storage element at time-frame t−1. In another embodiment, the method identifies any loops that are in the circuit. In a loop, a signal value comes from a gate at a time-frame and loops back to a loop-back gate at an earlier time-frame. Having identified a loop in the circuit, the method displays elements in the loop at different time-frames instead of showing the loop in the schematic representation.