The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6784066 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 31, 2004

Filed:

Sep. 25, 2001
Applicant:
Inventor:

Atsushi Hachisuka, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/120 ;
U.S. Cl.
CPC ...
H01L 2/120 ;
Abstract

A plurality of gate electrodes is formed on a semiconductor substrate having a DRAM area and a logic area. Next, sidewalls, each of which includes a silicon nitride film covering the sides of gate electrodes and a silicon oxide film covering the silicon nitride film, are formed on the sides of the gate electrodes respectively. After formation of a transistor having an LDD structure in the logic area, the silicon oxide film formed on the sides of the gate electrodes is removed by wet etching. Next, a silicon nitride film is formed on the whole surface of the semiconductor substrate, and an interlayer dielectric is formed on the silicon nitride film.


Find Patent Forward Citations

Hachisuka, Atsushi. (2004). Method for manufacturing semiconductor device and semiconductor device manufactured thereby (U.S. Patent No. 6784066). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6784066

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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