The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2004

Filed:

Jan. 11, 2001
Applicant:
Inventors:

Tetsushi Tanizaki, Hyogo, JP;

Takeshi Hamamoto, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 2/900 ; G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 2/900 ; G11C 7/00 ;
Abstract

In the semiconductor memory device, a control circuit generates various commands for a memory cell array according to an internal command control signal and an internal address signal output from an input switching circuit for switching an input source of the command control signals and the address signal between an external terminal and a BIST circuit. In the BIST mode, the input switching circuit cuts the signal input from the external terminal and generates the internal command control signal and the internal address signal according to an output signal from the BIST circuit. Transition to the BIST mode and return to the normal operation mode are indicated by a combination of signals supplied to the external terminal. Therefore, an interface between a built in BIST circuit and other internal circuits can be secured without an addition of a special interface specification.


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