The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2004

Filed:

Sep. 19, 2002
Applicant:
Inventors:

Richard S. Jensen, Aloha, OR (US);

David S. Dunning, Portland, OR (US);

Michael M. DeSmith, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/730 ;
U.S. Cl.
CPC ...
H03K 1/730 ;
Abstract

A switch circuit having low charge dumping characteristics includes multiple parallel connected switching transistors and one or more associated cancellation transistors. The switching transistors perform basic switching functions within the switch circuit in response to a digital signal. During transitions of the digital signal, the switching transistors dump charge on an output node thereof due to parasitic capacitances within the devices. The cancellation transistor(s) dumps charge of an opposite polarity on the output node to cancel the charge dumped by the switching transistors. Two switching transistors are used for each cancellation transistor so that equal sized devices can be used throughout the switch circuit.


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