The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2004

Filed:

Jun. 19, 2002
Applicant:
Inventors:

Thorsten Schedel, Dresden, DE;

Jens Zimmermann, Dresden, DE;

Sebastian Schmidt, Dresden, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 9/00 ;
U.S. Cl.
CPC ...
G03F 9/00 ;
Abstract

After exposing a semiconductor wafer, quality parameters, for example, the critical dimension, the overlay accuracy, and alignment parameters, etc. are measured in successive inspections and are compared with tolerance range widths that are specified dynamically by calculating the range from measured values of one or more of the other quality parameters. For example, the tolerance range width for the overlay accuracy can be increased for smaller measured critical dimension values of the same structures without affecting the functionality of the integrated circuit. Using a forward mechanism, the tolerance ranges can also be adjusted with the quality parameter measurements from a first layer to the quality parameter tolerance range width of a second layer.


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