The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2004
Filed:
Mar. 24, 2003
Applicant:
Inventor:
Oskar Leuthold, Santa Cruz, CA (US);
Assignee:
Cadence Design Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B 3/10 ;
U.S. Cl.
CPC ...
H03B 3/10 ;
Abstract
A system and method for simulating the noise characteristics of phase locked loops (PLL's) and other devices. Voltage Controlled Oscillator (VCO) transfer function and phase noise data is first imported for a particular circuit from a Radio Frequency (RF) simulator. The phase locked loop blocks in the circuit are converted to calibrated behavioral-level models. A combined analog/digital model is used to model the VCO, which in turn uses a pseudorandom signal generator for simulating VCO noise. Information about VCO periods is then written to a file or memory for post-processing, such as creating noise spectrum data and noise spectrum plots.