The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2004
Filed:
Jul. 31, 2001
Mohamed Imam, Tempe, AZ (US);
Joe Fulton, Chandler, AZ (US);
Zia Hossain, Tempe, AZ (US);
Masami Tanaka, Fukushima, JP;
Taku Yamamoto, Ishidou-machi, JP;
Yoshio Enosawa, Miyagi-ken, JP;
Katsuya Yamazaki, Monden-machi, JP;
Evgueniy Stefanov, Vieille Toulouse, FR;
Semiconductor Components Industries, L.L.C., Phoenix, AZ (US);
Abstract
A high voltage MOSFET device ( ) has an nwell region ( ) with a p-top layer ( ) of opposite conductivity formed to enhance device characteristics. The p-top layer is implanted through a thin gate oxide, and is being diffused into the silicon later in the process using the source/drain anneal process. There is no field oxide grown on the top of the extended drain region, except two islands of field oxide close to the source and drain diffusion regions. This eliminates any possibility of p-top to be consumed by the field oxide, and allows to have a shallow p-top with very controlled and predictable p-top for achieving low on-resistance with maintaining desired breakdown voltage.