The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 2004
Filed:
Sep. 21, 2000
Seshadri Vikram, Fremont, CA (US);
William J. Schaefer, San Jose, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
An improved arrangement for attaching a heat sink to a flip chip type die is disclosed. More specifically, the heat sink is attached to the back surface of the flip chip die by a metallic solder material. Such an arrangement provides a good thermal conductivity between the die and the heat sink. In some embodiments, the die is mounted on a grid array type substrate in a flip chip arrangement such that the die contacts are coupled to adjacent I/O pads on the substrate. In another aspect, one or more metallic intermediate die attach layers are deposited over the back surface of the die to form a solderable die surface. The heat sink is then attached to the solderable die surface. This approach works well when the chosen solder does not adhere well to the semiconductor die material. In one preferred implementation the intermediate metallic layers include a barrier layer that is deposited over the back surface of the die and a solderable metallic layer that is deposited over the barrier layer. In a method aspect, the barrier and metallic layers may be deposited on the back side of a wafer during fabrication which provides the desired structure after dicing.