The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6769106 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 27, 2004

Filed:

Feb. 13, 2002
Applicant:
Inventor:

Takao Hasegawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

The wiring method includes determining wirings based on a condition that one through-hole is formed; picking up a pair of wirings that are disposed on different layers and that need to be electrically connected to each other, from among the determined wirings, and extracting areas occupied by the wirings; making a decision about whether there exist areas that coincide with each other between the wirings; making a decision about whether the coincident areas have space sufficient for an additional through-hole; and setting an additional through-hole on the coincident areas with sufficient space.


Find Patent Forward Citations

Hasegawa, Takao. (2004). Method of wiring semiconductor integrated circuit, semiconductor integrated circuit, and computer product (U.S. Patent No. 6769106). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6769106

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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