The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2004

Filed:

Feb. 18, 2003
Applicant:
Inventor:

Hilario Oh, Rochester Hills, MI (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/900 ; G06F 7/00 ;
U.S. Cl.
CPC ...
G06F 1/900 ; G06F 7/00 ;
Abstract

A wafer track and lithography cluster tool for performing a series of processes with a scheduler which synchronizes all events in a substrate processing system. Events in the cluster tool are scheduled to occur at regular, periodic intervals, thereby improving throughput and quality. The scheduler also eliminates conflicts for transportation resources between modules in the cluster tool. Wafers are loaded into the cluster tool at a regular interval, referred to as a sending period. All events in the system are synchronized with the sending period, and all event timings are normalized in terms of the sending period. The conflicts are resolved by selectively adding delays in modules which can tolerate them without degrading throughput or performance in the system; modules that cannot tolerate delays are exempted. The periodicity of the scheduled cluster tool enables the identification of wafers in the cluster tool. The identification of the order in which a wafer was loaded also identifies a module path followed by the wafer.


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