The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 27, 2004
Filed:
Feb. 13, 2003
United Microelectronics Corp., Hsinchu, TW;
Abstract
A silicon-on-insulator low-voltage-triggered silicon controlled rectifier device structure that is built upon a substrate and an insulation layer. The insulation layer has a plurality of isolation structures thereon to define a device region. A first-type well and a second-type well are formed over the insulation layer. The first-type and second-type wells are connected. A first gate and a second gate are formed over the first-type well and the second-type well, respectively. The first-type well further includes a first second-type doped region and a first first-type doped region formed between the first second-type doped region and the isolation structure adjacent to the first second-type doped region. The first second-type doped region and the first first-type doped region together form a cathode of the SOI-SCR device. A second first-type doped region is formed within the first-type well between the first second-type doped region and the first gate structure adjacent to the first second-type doped region. A third first-type doped region is formed within the first and the second-type well around their junction between the first and second-type well. The second-type well further includes a second second-type doped region and a fourth first-type doped region within the second-type well between the second second-type doped region and the second gate adjacent to the second second-type doped region. The second second-type doped region and the fourth first-type doped region together form an anode of the SOI-SCR device.