The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2004
Filed:
Dec. 30, 1999
Applicant:
Inventors:
Iksoo Pyo, Hillsboro, OR (US);
Michelle Yu, Hillsboro, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract
A deferred merging router. Partial feasible routing solutions corresponding to each of a subset of a set of wires to be routed are identified. The partial feasible routing solutions are then merged to identify one or more feasible routing solutions for the set of wires to be routed. In one aspect of the invention, the final routing for an integrated circuit device may then be selected from the feasible routing solutions which may be ordered by one or more user-selected cost functions.