The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 20, 2004
Filed:
Apr. 26, 2002
Applicant:
Inventors:
Jason Cheng, Fremont, CA (US);
Cyrus Tsui, Los Altos Hills, CA (US);
Satwant Singh, Fremont, CA (US);
Albert Chen, Palo Alto, CA (US);
Ju Shen, Saratoga, CA (US);
Clement Lee, Portland, OR (US);
Assignee:
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/9177 ;
U.S. Cl.
CPC ...
H03K 1/9177 ;
Abstract
A programmable device and method with generic logic blocks. Each generic logic block is configurable to perform product term logic functions and memory functions, such as RAM, dual-port RAM, ROM, CAM, FIFO and switch.