The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 20, 2004

Filed:

Oct. 11, 2001
Applicant:
Inventors:

Richard Lai, Redondo Beach, CA (US);

Harvey N. Rogers, Playa del Rey, CA (US);

Yaochung Chen, Rancho Palos Verdes, CA (US);

Michael E. Barsky, Sherman Oaks, CA (US);

Assignee:

Northrop Grumman Corporation, Redondo Beach, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B08B 3/02 ;
U.S. Cl.
CPC ...
B08B 3/02 ;
Abstract

Apparatuses ( ), and methods of using same, for the simultaneous thinning of the backside surfaces of a plurality of semiconductor wafers (W) using a non-crystallographic and uniform etching process, are described. The apparatuses ( ) include a fixture ( ) having a plurality of horizontal receptacles ( ) for receiving the semiconductor wafers (W). The loaded fixtures ( ) are then immersed into an etchant solution ( ) that is capable of isotropically removing a layer of semiconductor material from the backside surface of the semiconductor wafers (W). The etchant solution ( ) is preferably heated to about 40° C.-50° C. and constantly stirred with a magnetic stirring bar ( ). Once a sufficient period of time has elapsed, the thinned semiconductor wafers (W) are removed from the etchant solution ( ). The apparatuses ( ) are capable of simultaneously thinning several semiconductor wafers (V) down to a final thickness of about 25 &mgr;m.


Find Patent Forward Citations

Loading…