The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2004

Filed:

Jul. 01, 2003
Applicant:
Inventors:

Gary P. Morrison, Garland, TX (US);

Gregory E. Howard, Dallas, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/352 ;
Abstract

A substrate ( ) for use in semiconductor devices, having first ( ) and second ( ) surfaces and a base structure including insulating material. A plurality of I/O terminal pads ( ) is distributed on the first and second surfaces, respectively, and these terminal pads are interconnected by conducting traces integral to the base structure. A plurality of selected metal layers ( to ) is distributed in the structure; the metal layers are substantially parallel to the surfaces and separated by the insulating material from each other and from the surfaces. At least one metal layer ( or , respectively) opposite each of the surfaces has openings ( ) therein configured so that the metal areas ( ) directly opposite each of the terminal pads ( ) are electrically isolated from the remainder of the layer. The width of these openings is selected to provide a pre-determined capacitance between each of the terminals ( ) and the remainder of the metal layer ( ).


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