The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2004
Filed:
May. 31, 2002
Reima Tapani Laaksonen, Dallas, TX (US);
Jarvis B. Jacobs, Murphy, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method of forming a narrow feature, such as a gate electrode ( ) in an integrated circuit is disclosed. A gate layer ( ) such as polycrystalline silicon is disposed near a surface of a substrate ( ), and a hardmask layer ( ) is formed over the gate layer ( ). The hardmask layer ( ) includes one or more dielectric layers ( ) such as silicon-rich silicon nitride, silicon oxynitride, and oxide. Photoresist ( ) sensitive to 193 nm UV light is patterned over the hardmask layer ( ) to define a feature of a first width (CD) that is reliably patterned at that wavelength. The hardmask layer ( ) is then etched to clear from the surface of the gate layer ( ). A timed overetch of the hardmask layer ( ) reduces hardmask CD and that of the overlying photoresist ( ) to the desired feature size. Etch of the gate layer is then carried out to form the desired feature.