The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2004

Filed:

Apr. 23, 2002
Applicant:
Inventor:

Heon Lee, Sunnyvale, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/26 ;
U.S. Cl.
CPC ...
G03F 7/26 ;
Abstract

A method for fabricating sub-lithographic sized line and space features is disclosed. The method includes the use of conventional microelectronics processing techniques such as photolithographic patterning and etching, polysilicon deposition, polysilicon oxidation, polysilicon oxide etching, polysilicon wet and plasma etching, and chemical mechanical planarization. Polysilicon line features having a feature size that is greater than or equal to a lithography limit are oxidized in a plasma that includes an oxygen gas. The oxidation forms a sub-lithographic sized polysilicon core and an oxidized polysilicon mantel that includes portions along sidewall surfaces of the sub-lithographic sized polysilicon core that also have a sub-lithographic feature size. After planarization and a plasma etch that is selective to either the polysilicon or the oxidized polysilicon, a plurality of sub-lithographic sized line and space patterns are formed. Those line and space patterns can be used for an imprinting stamp for nano-imprint lithography.


Find Patent Forward Citations

Loading…