The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6757967 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 06, 2004

Filed:

Apr. 09, 2002
Applicant:
Inventors:

Lisa J. Jimarez, Newark Valley, NY (US);

Miguel A. Jimarez, Newark Valley, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/30 ;
U.S. Cl.
CPC ...
H05K 3/30 ;
Abstract

A chip mounting assembly is provided which includes a dielectric substrate having at least one integrated circuit (I/C) chip mounted thereon. An electrically conductive cover plate is in contact with all the chips with an electrically non-conducting thermally conducting adhesive. A stiffener member is provided which is mounted ante substrate and laterally spaced from the integrated circuit chip. At least one electrically conductive ground pad is formed an the substrate. The stiffener member has at least one through opening therein and electrically conductive adhesive extending through each opening and contacting the cover plate and each ground pad. The invention also provides a method of forming such an I/C chip assembly.


Find Patent Forward Citations

Jimarez, Lisa. (2004). Method of forming a chip assembly (U.S. Patent No. 6757967). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6757967

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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