The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2004

Filed:

Feb. 21, 2002
Applicant:
Inventors:

Gyu-Chan Jeong, Suwon, KR;

Ki-Sang Kim, Yongin, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B65B 3/100 ;
U.S. Cl.
CPC ...
B65B 3/100 ;
Abstract

A load port of a semiconductor manufacturing apparatus includes a plurality of kinematic coupling pins and a plurality of sensors integrated with the pins. The contacts of the sensors have upper portions that protrude from the pins. Thus, when a cassette is place on the load port, the sensors can reliably sense whether the cassette is resting properly and/or can determine whether the cassette contains wafers. Once such determinations are made in the positive, a command signal is issued that serves to load the wafers into a chamber of the manufacturing apparatus.

Published as:
US2002114684A1; KR20020068779A; KR100410991B1; US2004072376A1; US6755221B2;

Find Patent Forward Citations

Quick Actions:

Jeong, Gyu-Chan. (2004). Load port of a semiconductor manufacturing apparatus having integrated kinematic coupling pins and sensors, and method of loading wafers using the same (U.S. Patent No. 6755221). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6755221

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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