The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2004
Filed:
Sep. 05, 2002
Applicant:
Inventor:
Yasunobu Nakase, Hyogo, JP;
Assignee:
Renesas Technology Corp., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/9175 ;
U.S. Cl.
CPC ...
H03K 1/9175 ;
Abstract
Even if a power supply potential VDD of a core section is set in an off state, a latch of a level conversion circuit holds a value corresponding to an output. It is, therefore, possible for a semiconductor device to hold an output state of an output node. Thereafter, an enable signal is deactivated, whereby the output node can be set in a high impedance state and a bus or the like can be released to the other device.
Nakase, Yasunobu. (2004). Semiconductor device capable of maintaining output signal even if internal power supply potential is turned off (U.S. Patent No. 6753697). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6753697
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