The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2004
Filed:
Sep. 18, 1990
Takahiko Takahashi, Iruma, JP;
Fumikazu Itoh, Fujisawa, JP;
Akira Shimase, Yokohama, JP;
Mikio Hongo, Yokohama, JP;
Satoshi Haraichi, Yokohama, JP;
Hiroshi Yamaguchi, Fujisawa, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
Herein disclosed are a variety of techniques relating to the wiring and logic corrections on a chip by making use of the focused ion beam (which is shortly referred to as “FIB”) or the laser selection metal CVD. The time periods for the wiring corrections and for debugging and developing an electronic system are shortened by making use of the processing characteristics of the FIB. Illustratively, a hole is bored in an insulating film above a portion of a wiring which is to be connected to another wiring by means of a focused ion beam. The inside of the hole and a predetermined region on the insulating film are irradiated with either a laser beam or an ion beam in a metal compound gas to deposit metal in the hole and on said region and a connecting wiring is formed by means of optically pumped CVD. The present invention also relates to an IC or VLSI structure having a trial cutting region, at test etching region and an auxiliary wiring or pad, suitable for the application of such defect correction and circuit change, as well as a method of making same, a designing method using such technique, and a focused ion beam system and other systems for use in those methods.