The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 08, 2004
Filed:
Nov. 02, 2000
Applicant:
Inventors:
Johnny James LeBlanc, Austin, TX (US);
Timothy Skergan, Austin, TX (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11R 3/128 ;
U.S. Cl.
CPC ...
G11R 3/128 ;
Abstract
A method and apparatus for testing path delays in a high-speed boundary scan implementation overcomes limitations imposed by pipelined high-speed clocking architectures used in integrated circuits. A special phase hold circuit provides a mechanism for clocking circuits undergoing dynamic tests, permitting the dynamic test to produce proper results when the integrated circuit under test is clocked with a high-speed distributed clock. The functional logic clock enable is pipelined to synchronize the functional mode clock with the test mode clock when the tester mode is switched.