The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2004

Filed:

Dec. 30, 2002
Applicant:
Inventors:

Jozef C. Mitros, Richardson, TX (US);

Lily Springer, Dallas, TX (US);

Roland Bucksch, Richardson, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/9788 ;
U.S. Cl.
CPC ...
H01L 2/9788 ;
Abstract

An EEPROM ( ) comprises a source region ( ), a drain region ( ); and a polysilicon layer ( ). The polysilicon layer ( ) comprises a floating gate comprising at least one polysilicon finger ( A- E) operatively coupling the source region ( ) and drain region ( ) and a control gate comprising at least one of the polysilicon fingers ( A- E) capacitively coupled to the floating gate. The EEPROM ( ) has a substantially reduce area compared to prior art EEPROM since an n-well region is eliminated.


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