The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2004

Filed:

Mar. 15, 2001
Applicant:
Inventors:

Dean S. Susnow, Portland, OR (US);

Richard D. Reohr, Jr., Hillsboro, OR (US);

Timothy Barilovits, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 3/05 ; G06F 1/100 ;
U.S. Cl.
CPC ...
H02H 3/05 ; G06F 1/100 ;
Abstract

Method and apparatus for link physical error tracking that includes a one or more shift registers, one or more counters, and a comparator. The shift register receives one or more status bits for an input data stream denoting whether bytes of the input data stream have a link physical error. The counter increments an error count when receiving at least one status bit that denotes a link physical error, and decrements the error count when receiving at least one status bit from an output of the shift register that denotes a link physical error. The comparator compares the error count with a maximum value. A retrain signal is generated if the error count becomes larger than or equal to the maximum value. The retrain signal may be used to signal that a connection between two nodes needs to be retrained to get the two nodes back into synchronization. Link physical errors that occur aligned and misaligned with a rising edge of a symbol clock are trackable.


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