The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6737729 B1

PDF
Full Text
Expired
Date of Patent:
May. 18, 2004

Filed:

Oct. 23, 2001
Applicant:
Inventors:

Masakazu Shiinoki, Kyoto, JP;

Kenji Sakurai, Kyoto, JP;

Mitsuru Fujii, Kyoto, JP;

Assignee:

Omron Corporation, Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/982 ;
U.S. Cl.
CPC ...
H01L 2/982 ;
Abstract

A semiconductor device is provided that simplifies wiring pattern and is capable of being etched through an etching hole as a concavity is produced over a short time period. A dielectric film is formed so as to shield the concavity formed upon the upper surface of a silicon substrate . A circuit pattern that has a thermoelectric conversion element is formed upon the dielectric film. The upper surface of the silicon wafer becomes a (100) surface, and a first etching hole extending in the <110> direction of the silicon substrate and a second etching hole extending in the <&minus;110> direction are formed. These holes intersect in a cross shape. Shapes of the first and second etching holes become parallelograms which have oblique sides tilted with respect to <110> and <&minus;110>. Imaginary rectangles passing though the vertices of the first and second etching holes are continuous. As a cross shape is removed from the silicon substrate, etching is rapid due to the appearance of (411) surfaces at the intersecting part.


Find Patent Forward Citations

Shiinoki, Masakazu. (2004). Anisotropic etching of a semiconductor device using tilted etching holes (U.S. Patent No. 6737729). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6737729

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